In order to display an image on a display panel such as a liquid crystal panel having large capacitance or the like using image signals conforming to the interlaced format such as television signals, there has known a format such as a system for driving two lines of a display panel at the same time using one-line signal during each field period (called “line doubler system”). According to use of this line doubler system, an image can be displayed on a large-capacitance display panel using signals conforming to the interlaced format, but the image that an image signal thereof represents cannot be displayed in a suitable manner. Specifically, of image signals conforming to this interlaced format, in the event that signals equivalent to two lines to be driven at the same time mutually differ, not only substantial resolution of still image display deteriorates, but also an edge portion of a display image flickers or blurs. As a technique for avoiding such an inconvenience, there has heretofore been employed a technique for converting an image signal conforming to the interlaced format into an image signal according to the progressive format (this conversion is called “IP conversion”) to drive the display panel one line at a time (hereinafter, referred to as IP conversion+1-line driving technique).
On the other hand, in accordance with high definition of a display image or increase in the size of a display panel, securable charge time is shortened for writing of an image signal to the display panel, and accordingly, insufficient charge in the pixel capacitance of the display panel causes a problem. As a technique for preventing this insufficient charge, a technique called pre-charging has been known. This is a technique wherein at the time of two horizontal periods (2H periods) ahead of a point-in-time when an image signal is to be written in each line in a liquid crystal panel, an active signal is applied to a gate signal line (scanning signal line) corresponding to this line, thereby preliminarily charging each pixel capacitance in this line using an image signal having the same polarity as an image signal to be written in this line (image signal to be written in pixel capacitance in a line two lines ahead).
Note that techniques relating to the present invention have been disclosed in PTL 1 and PTL 2. Specifically, with PTL 1, there has been disclosed a configuration wherein, in order to have a display device which is weak in high-speed scanning, such as a liquid crystal display device or the like, display a progressive scanning video signal with a high-speed data rate, one video screen is displayed from video signals in multiple frame periods taking into consideration the polarity of a video signal. Also, with PTL 2, there has been disclosed a liquid crystal TV driving circuit independently including a data-side driver and a scanning-side driver regarding each of an odd-line pixel group and an even-line pixel group of a liquid crystal panel, which can independently drive the odd-line pixel group and even-line pixel group at the same time. Note that, in this manner, a configuration has also been disclosed in NPL 1 wherein the odd-line pixel group and even-line pixel group are simultaneously driven.